432-Core Chipset-Based RISC-V Chip Nearly Ready to Explode into Space
The Occamy processor is taped, which makes use of a chip structure, packs 432 RISC-V and AI accelerators, and comes with 32GB of HBM2E reminiscence. The chip is supported by the European House Company and was developed by engineers from ETH Zurich and the College of Bologna. HPC Wire.
The ESA-powered Occamy processor makes use of two chips with 216 32-bit RISC-V cores, an unknown variety of 64-bit FPUs for matrix calculations, and carries two 16GB HBM2E reminiscence packages from Micron. The cores are interconnected utilizing a silicon middleman and the twin tile CPU can present 0.75 FP64 TFLOPS of efficiency and 6 FP8 TFLOPS of computing functionality.
Neither ESA nor its growth companions have disclosed the ability consumption of the Occamy CPUs, however it’s mentioned that the chip could also be passively cooled, i.e. a low-power processor.
Every Occamy chip has 216 RISC-V cores and matrix FPUs, comparable to roughly one billion transistors unfold over 73mm^2 silicon. The tiles are made by GlobalFoundries utilizing the 14LPP manufacturing course of.
The 73mm^2 chip shouldn’t be a very massive die. For instance, Intel’s Alder Lake (with six high-performance cores) has a die dimension of 163mm^2. In terms of efficiency, Nvidia’s A30 GPU with 24GB of HBM2 reminiscence presents 5.2 FP64/10.3 FP64 Tensor TFLOPS in addition to 330/660 (sparse) INT8 TOPS.
In the meantime, one of many benefits of chiplet designs is that ESA and their companions at ETH Zürich and the College of Bologna can add different chipsets to the bundle if wanted to speed up sure workloads.
The Occamy CPU was developed as a part of the EuPilot program and is considered one of many chips ESA is contemplating for spaceflight computing. Nonetheless, there isn’t any assure that the method will truly be used on spaceships.
The Occamy design goals to assist high-performance and AI workloads by way of the naked {hardware} runtime, nevertheless it’s not but clear whether or not the runtime can be on the container degree or naked {hardware} degree. The Occamy processor might be emulated in FPGAs. Implementation examined on two AMD Xilinx Virtex UltraScale+ HBM FPGAs and Virtex UltraScale+ VCU1525 FPGAs.
#432Core #ChipsetBased #RISCV #Chip #Prepared #Explode #House
