AMD Responds to EPYC Genoa Memory Fault Allegations, Says Update Is Coming

At a current monetary convention, AMD CTO Mark Papermaster was requested a few reminiscence bug report within the firm’s EPYC Genoa processors that will apparently require a prolonged redesign/re-spin course of to repair. His reply was a bit obscure, so we spoke to AMD for extra particulars. The corporate denied allegations of a reminiscence error and mentioned: Tom’s {Hardware} that every one fourth-generation EPYC processors shipped to this point totally assist the upcoming 2DPC reminiscence configuration and no refactoring is required. Moreover, the corporate has launched BIOS updates to OEM companions to allow promised assist for 2DPC configurations by the top of Q1 2023. AMD additionally shared different particulars, which we’ll cowl under. However first, slightly background info.

As you’ll be able to see in our EPYC Genoa overview, AMD’s new knowledge middle chips ship market-leading efficiency and include a number of new interfaces, an important of which is assist for 12-channel DDR5 reminiscence. Nevertheless, the Genoa was solely launched in a DIMM per channel (1DPC) configuration with assist for DDR5 reminiscence. Any such configuration helps just one reminiscence stick linked to every of the twelve DDR5 reminiscence controllers throughout the processor.

Initially, AMD mentioned it can launch a BIOS replace within the first quarter of 2023 to offer assist for 2 reminiscence DIMMs per channel (2DPC), thereby permitting two reminiscence sticks to be linked to every reminiscence channel to extend capability. AMD mentioned it has additional characterised and tuned its 2DPC reminiscence configurations so that it’s going to launch specs for supported 2DPC reminiscence speeds when the replace turns into out there.

by the way in which, Half Right (partially paywalled) reported a supposed concern with AMD’s Genoa processors final month. The report cited unnamed business sources claiming a bug in Genoa’s reminiscence subsystem, so AMD needed to undertake a expensive reconfiguration of processors to assist 2DPC reminiscence configurations. This can inevitably result in delays of a number of months as new chips work by means of the redesign and manufacturing course of.

Naturally, a bug within the reminiscence subsystem for transport chips signifies that at the moment transport Genoa processors won’t assist the upcoming 2DPC options. So, to find out if a brand new response was wanted, we requested AMD if all Genoa processors at the moment in circulation would assist the 2DPC reminiscence configuration at launch, and the corporate assured us that this was the case.

Moreover, AMD went on the file saying that no response is required for 2DPC assist. As a substitute, the corporate says that 2DPC assist solely requires the BIOS replace it has already launched to OEM prospects. In consequence, they’re already designing motherboards with sufficient slots to assist the function.

AMD additionally clarified Papermaster’s misinterpreted feedback on the current Morgan Stanley investor convention. On the convention, Papermaster mentioned, “And a couple of DIMMs per channel, I feel what you are speaking about follows. So that is focused – for a a lot smaller buyer group. These speeds can be introduced later this 12 months. Quarterly and that can enhance as nicely, however for two DIMMs per channel. this variety of prospects is far much less.” AMD says the “ramp” remark refers to methods that assist 2DPC configurations (they want extra bodily slots), not a more recent revision of the processor.

Genoa’s 12-channel DDR5 assist is the best available on the market for an x86 processor. Genoa has 50% extra channels than Sapphire Rapids’ eight channels, and each chips assist peak DDR5-4800 reminiscence in 1DPC configuration. Intel has specified the 2DPC configuration as DDR5-4400, however as talked about, AMD hasn’t completed qualifying 2DPC switch speeds.

AMD’s determination to launch Genoa earlier than it completes 2DPC assist is smart – it is cheap to count on demand for 2DPC configurations to be a lot lower than we have seen up to now. The 2DPC configuration is usually used to entry elevated capability (small efficiency enhancements could happen in sure tiered configurations). However with 12 reminiscence channels in a 1DPC configuration, AMD can assist as much as 3TB of reminiscence per chip with 256GB sticks. That is ample for the widest cross-section of customers. 2DPC assist will increase this capability to 6TB DDR5 per slot, however AMD is already dealing with area constraints by becoming 12 channels of reminiscence into common two-socket servers.

As you’ll be able to see within the above picture of our Genoa check server, populating a complete of 24 DIMM slots for a 1DPC configuration already poses lots of issues because of area constraints. Frankly, it is laborious to think about packing twice the variety of slots pictured for a 2DPC configuration — a twin slot server would want a complete of 48 slots. For that reason, we consider most 2DPC configurations will possible be for single socket servers or use fewer channels on twin socket servers.

There are quite a few challenges enabling the 1DPC configuration within the image. The truth is, AMD had to make use of particular ‘weak’ reminiscence slots for Genoa motherboards to suit 12 slots within the chassis. AMD warned us that because of slim slots and different laws for denser association, it encountered a number of incidents when putting in DDR5 DIMMs inflicting lateral stress to dislodge the DIMM socket from the board. That is excessive and never indicative of a platform-related concern, however does level to the challenges AMD is at the moment dealing with with ‘solely’ 12 reminiscence slots.

The challenges for 2DPC transcend the area required for extra slots. As we have seen with DDR4 reminiscence, including extra DIMMs per channel causes reminiscence speeds to drop and extra channels provides extra complexity. Additionally, even when further empty slots may end up in slower peak reminiscence speeds, as seen within the complicated matrix of DDR4 and DDR5 assist for shopper platforms. These points develop into much more troubling with DDR5 as DDR5 has a lot greater tolerances and requires extra complicated motherboard designs with extra layers and higher supplies, which will increase the fee. This can develop into tougher with the upper switch speeds required for next-gen reminiscence — market specialists have even predicted that 2DPC assist could finish with the DDR6 customary.

As a result of ordinary velocity drop in 2DPC configurations, Intel’s Sapphire Rapids drops from DDR5-4800 to DDR5-4400 in 2DPC configurations. We are able to count on Genoa’s 2DPC speeds to drop as nicely when the corporate releases the ultimate spec, however it’s not but clear how a lot of a penalty this can be.

AMD says it can reveal particulars of Genoa’s 2DPC assist this month and can replace as soon as it receives the main points.